• Advanced Technology Design
 
  • TSMC 16nm DDR3/4 testchip tapeout in 2013'Q4
  • TSMC 20nm Soft Error Rate testchip tapeout in 2013'Q1
  • TSMC 28nm design momentum in 2013
  • TSMC 40nm mass production since 2012
                                  
 
  • Selected 28nm Project Summary
Process
Gate Count
Product Type Features
28HP
 
8M
 
Network
  • - Customized standard cell
    - Customized TSMC IO
    - Process Monitor circuit added
28HP 50M Network
  • - Multiple Cores
    - Network on chip
28HPM

15M 

Memory
  • - GHz on-chip SRAM with 64M macros
    - GHz at-speed MBIST
    - Multiple Voltage implementation
28HPM 30M Processor
  • - Multi-core 1.6GHz CA9MPx2
    - MTCMOS low power design
    - Variation Management Kits 
28HPM 40M Computer
  • - SAS/SATA 3.0 PHY
    - PCIe Gen3 PHY
    - DDR3
28HPM 50M Consumer
  • - PCIe Gen3 / USB 3.0
    - LPDDR2
    - Cortex A7
  • Selected 40nm Project Summary
Process
Gate Count
Product Type Features
40G
 
4M
 
Computer
  • - Bit Embedded SRAM
  • - USB 2, SATA 2, DDR2@1033MHz
  • - ARM A9 Dual core @ 1.2GHz
40G 14.6M Network
  • - Triple Gate Oxide Process
  • - DDR2, LVDS, XAUI, SerDes (1G/10G)
  • - Flip Chip Package Design
40G

8.5M 

Network
  • - ARM926 ,SerDes (1G/10G)
  • - DDR2, LVDS, HSTL, XAUII
  • - Flip Chip Package Design
40G 8M Network
  • - TSMC STD Cell @ 1GHz
  • - GPON PHY, SGMII PHY, PCIE PHY
  • - DDR2/3 PHY / Controller, USB 2, PLL
40G 8.7M Computer
  • - ARM Cortex A9@ 1.2GHz Speed
  • - DDR 2, SATA 2, USB 2, eDRAM
  • - SiP Package with Flip Chip Design
40G 32M Communication
  • - ARM926/ETB/ ETM9 x 4
  • - Virage STD 9T/12T with Multi Channel
  • - DDR 2, SRIO x4, SerDes 4 Lane x4
40LP 9.2M Communication
  • - Triple Gate Oxide Process
  • - SiP Package/Low Power Design
  • - USB 2, mDDR, ARM Cortex R4
40LP 30M Communication
  • - SiP Package /Low Power Design
  • - 40M Embedded SRAM
  • - USB 2, mDDR
40LP 40M Communication
  • - 37M Embedded SRAM
  • - DSP Core, DDR 2, USB 2, ADC, DAC
  • - Flip Chip Package Design
 40LP   5.8M Consumer 
  • - 8.7M Bit Embedded SRAM
  • - DDR 2/3, USB 2, SATA 2
  • - ARM Cortex A9@1.2GHz Speed
  • Selected 65nm Project Summary
Process Gate Count
Product Type
Features
65GP 10M
Network
  • - Synopsys DDR3
  • - Cadence SerDes
65GP 8.5M
Consumer 
  • - 13.5M Bits Embedded SRAM
  • - ARM926 Core
  • - DDR2/3 Combo
65GP 5M
Network
  • - ARM926 Core
  • - SerDes, DDR2/3 Combo
65GP 4.5M
Consumer 
  • - 11.5M Bits Embedded SRAM
  • - ARM926926EJS / ETM9
  • - LVDS, ADC, DAC, OSC
     
65LP 5.8M
Consumer 
  • - 5.8M Bits Embedded SRAM
  • - ARM1176JZF, DDR2 @ 800MHz
  • - USB x3, DAC, ADC
65LP 2.8M
Consumer 
  • - 11.5M Bits Embedded SRAM
  • - ARM926926EJS / ETM9
  • - LVDS, ADC, DAC, OSC
65LP 6M
Consumer 
  • - 3M Bits Embedded SRAM
  • - GUC LVDS, ADC, DAC, eDRAM
65LP 3M
Network
  • - 42M Bits Embedded SRAM
  • - DDR 2/3 Combo, LVDS
65ULP 13M
Communication
  • - 24M bits Embedded SRAM
  • - DDR 2 PHY/ Controller
  • - sRIO PHY/ Controller
       
 
 

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