Low Voltage Differential Signaling Interface (LVDS) Series


LVDS (Low-Voltage Differential Signaling) is a technical standard that defines a low power and high speed communication protocol. It is used mainly in display systems and high speed digital data transfer systems. 


LVSD is used to design larger, higher resolution displays and lower component counts while maintaining or lowering power consumption, bus interconnect and/or overall cost. It is generally used for display systems rated at lower than 1.5Gbps.


The LVDS I/O is also widely used in communication and high speed digital transfer systems. With its small signal voltage swing, LVDS technology offers high speed and low power characteristics that meet the application's performance requirement. GUC's LVDS PHY provides low lane-to-lane skew and high data rate multiple-lanes to support end products targeting high speed digital transfer applications.


The LVDS I/O is commonly used as a clock interface because of its excellent jitter performance in high frequency operation. GUC provides input and output LVDS IP with guaranteed jitter performance. In addition, GUC also provides customized interface services supporting other CML(Current-mode Logic)-like signaling standards.


GUC's LVDS Series I/O and PHY support data rates up to 1.5Gbps. GUC also provides other popular display interface standards, such as eDP and MIPI-DPHY to create a total display system solution and will soon offer V-by-One IP for high resolution TVs with data speeds up to 4Gbps.



LVDS IP Portfolio

Part. No Process Description Readiness Download
IGALVDV05A 12nm 1.5Gbps 6 Channel LVDS TX PHY V
IGALVDT14A 28nm 500Mbps 1 Lanes LVDS RX and CMOS Combo IO V
IGALVDT13A 28nm 500Mbps 2 channel TX & 1 chaneel RX LVDS IOPHY V
IGALVDT11A 28nm 1.0Gbps 8 channel (6 data + 1 clock+ 1 frame) LVDS RX PHY V
IGALVDT08B 28nm 1.5Gbps LVDS TX & RX IO V