GUC Joins Universal Chiplet Interconnect Express (UCIe) as Contributor Member

  • GUC is now the Universal Chiplet Interconnect Express (UCIe) Contributor Members and is ready to contribute our expertise to the next-generation of UCIe technology.

  • GUC proprietary die to die interface IPs (GLink) achieved industry-leading high bandwidth, low power and latency, silicon proven at 7nm and 5nm and will tape out at 3nm process in January 2023.

  • GLink already supports most of UCIe-1.0 digital and analog functionality

  • GLink to support UCIe: minor, low risk changes:

    • UCIe bump map, Link Training, Sideband Channel (digital), FDI Interface, in-band CRC


Learn more about GLink

GUC 核心优势

  • Advanced Packaging Technology Leadership
  • Design Engineering Excellence
  • Customer Trusted Service