GUC Joins Universal Chiplet Interconnect Express (UCIe) as Contributor Member
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GUC is now the Universal Chiplet Interconnect Express (UCIe) Contributor Members and is ready to contribute our expertise to the next-generation of UCIe technology.
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GUC proprietary die to die interface IPs (GLink) achieved industry-leading high bandwidth, low power and latency, silicon proven at 7nm and 5nm and will tape out at 3nm process in January 2023.
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GLink already supports most of UCIe-1.0 digital and analog functionality
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GLink to support UCIe: minor, low risk changes:
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UCIe bump map, Link Training, Sideband Channel (digital), FDI Interface, in-band CRC
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GUC 核心優勢
- Advanced Packaging Technology Leadership
- Design Engineering Excellence
- Customer Trusted Service