GUC Tapeouted 3DIC Testchip by WoW Technology

  • Beyond Moore’s law era, Chiplet is the economical method to build large systems out of smaller functions. There are several advanced packaging technologies for chiplets integration,  such as CoWoS, InFO_oS, SoIC, …, etc. After the experience of DTC stacked-on-logic die by WoW technology, GUC successfully taped out another 3DIC logic-on-logic test chip by WoW technology again. 

  • The Benefits of 3DIC   
    • Reduce RC loading, power consumption and latency
    • Increase bandwidth 
    • Heterogeneous die integration for PPA optimization  

For more information, please contact your GUC sales representative directly or email guc_sales@guc-asic.com
 

GUC 核心優勢

  • Advanced Packaging Technology Leadership
  • Design Engineering Excellence
  • Customer Trusted Service