GUC Custom Standard Cell Value Proposition
GUC provides Standard Cell customization service for SoC PPA optimization
- Low power cell
- Multi-Bit Flip-Flop (MBFF) (2, 4, 6 or 8 bits) for saving clock buffer’s size and power
- Big drive strength buffers with power via pillars and DCAP ready
Success Story
- Power optimization: Low Power Lib series (N16/N12/N7/N6/N5) achieves 20~30% power reduction and less area than TSMC library, DCAP cell increases capacitance in the same footprint for IR-drop
- Timing optimization: Hold-optimized MBFF mitigates hold time to zero to save timing fix effort and cost in Flip-Flop chain, big drive strength buffers with power via pillars and DCAP ready for chip clock tree implementation
GUC Core Strengths
- Advanced Packaging Technology Leadership
- Design Engineering Excellence
- Customer Trusted Service